1. Field of the Invention
The present invention relates to a bit data processor, and more particularly to a bit data processor which shifts a bit data by a desired number of bits.
2. Related Background Art
In a printer which prints out text information in the form of a bit image, a character pattern data for character codes of the text information is developed as a bit image on an image memory before it is printed out. The image memory of such a printer is usually read and written 4-8 bits parallel in accordance with a bit width of a data bus of a CPU. The character pattern data is of variety of forms, such as 8.times.10 bits, 14.times.18 bits or 24.times.24 bits, and in order to develop it on the image memory at a predetermined character interval, it is necessary to shift the character pattern data bit by bit in accordance with the address of the image memory.
In order to achieve this, the character pattern data is shifted bit by bit by a register in the CPU and then it is written into the image memory 4 bits parallel or 8 bits parallel, or a high speed shift circuit is provided between the CPU and the image memory and the character pattern data is shifted thereby and then it is written into the image memory. In the former method, the processing speed is too low when a high speed printer such as a laser beam printer is used. In the latter method, when a shift value is different from character pattern to character pattern, the CPU must update the shift value of the high speed shift circuit and the high speed feature of the high speed shift circuit is not fully utilized.